1. Field
This disclosure relates generally to data processing systems, and more specifically, to cache coherency in a data processing system.
2. Related Art
Data processing systems typically use multiple processors, each having a closely coupled cache memory, coupled via a system communication bus to a system memory. Cache memory stores a subset of duplicative information that is stored in the system memory. Each cache in the system reduces the number of occurrences that a processor must communicate with the system memory via the system communication bus. However, the presence of various memory devices in a system can readily permit a data operand which has the same identifier or address being present at various locations in the system. When the data operand is modified in one part of the system, an opportunity exists that an old version of the data operand will be stored or used. Memory coherency refers to the need of each processor in a multi-processing system to have access to the most recently modified data corresponding to a particular address in the memory system. The presence of differing data values for a same address value in a data processing system leads to system errors.
To maintain memory coherency, reads and writes of information to the system memory are monitored or “snooped”. When either a memory read or a memory write of data at an address is detected, this address is used as a snoop address. A snoop request is initiated, directed to all caches in the system to search for any address in the caches that match the snoop address. A snoop hit occurs for every match, and any needed corrective action is taken to maintain coherency of the data at the address in the cache where the snoop hit occurs.
Each snoop associated with a cache indicates a desired address and operation. In order to keep track of these requests and handle them efficiently, buffer queues are coupled to a cache memory. It is however difficult to maintain the cache performance without stalling or delaying its associated processor while at the same time providing efficient support for snoop requests. If snoop lookups block the processor from access to the cache, the processor performance is significantly reduced because the cache is unavailable for access by the processor. Therefore snooping techniques typically experience reduced system performance.